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FIGURE 22. MAXIMUM OPERATIONAL SPEED AND DIFFERENTIAL GAIN AND PHASE ERROR TEST CIRCUIT
FIGURE 23. DIGITAL OUTPUT CURRENT TEST CIRCUIT
HA5020 (Single)
HA5022(Dual)
HA5024 (Quad)
HA5013 (Triple)
HI1175 (8-Bit)
HSP9501
HSP48901
HSP43881
HSP43168
HI3338 (8-Bit)
HI1171 (8-Bit)
HA5020 (Single)
HSP9501: Programmable Data Buffer
HSP48901: 3 x 3 Image Filter, 30MHz, 8-Bit
HSP43881: Digital Filter, 30MHz, 1-D and 2-D FIR Filters
HSP43168: Dual FIR Filter, 10-Bit, 33MHz/45MHz
CMOS Logic Available in HC, HCT, AC, ACT and FCT.
HA5013: Triple, 125MHz, IOUT = 20mA
HA5020: Single, 100MHz, IOUT = 30mA, Output Enable/Disable
HA5022: Dual, 125MHz, IOUT = 20mA, Output Enable/Disable
HA5024: Quad, 125MHz, IOUT = 20mA, Output Enable/Disable
FIGURE 24. 8-BIT SYSTEM COMPONENTS
Test Circuits (Continued)
SIGNAL
SOURCE
NTSC
SG
VIN
8
SCOPE
VECTOR
620
DG
ERROR RATE
SG
(CW)
AMP
HI1175
DUT
ECL
TTL
D/A
10-BIT
-5.2V
CLK
1
2
1
2
HPF
COUNTER
DP
620
-5.2V
ECL
TTL
fC
-40
0
100
IRE
SYNC
BURST
0.6V
2.6V
40 IRE
MODULATION
0.6V
2.6V
fC -1kHz
HI20201
VRT
VIN
VRB
CLK
OE
GND
VDD
0.6V
2.6V
VOL
IOL
+
-
VRT
VIN
VRB
CLK
OE
GND
VDD
0.6V
2.6V
VOH
IOH
+
-
HI1175
A/D
D/A
DSP/
P
REFERENCE
ICL8069
AMP
HI1175
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